EDN

Under the Hood: New DRAM chip gets due notice

Over the years, there have not been many drastic changes to the structure of DRAM devices. There have been a few tweaks here and there to account for smaller process geometries and to optimize design, ...
Semiconductor Engineering

Micro Loading And Its Impact On Device Performance

How SEMulator3D can be used to study micro loading and manufacturing variability in an advanced DRAM process that exhibits a wiggling AA profile. In a DRAM structure, the charging and discharging ...
Semiconductor Engineering

Process Window Optimization Of DRAM By Virtual Fabrication

New integration and patterning schemes used in 3D memory and logic devices have created manufacturing and yield challenges. Industrial focus has shifted from the scaling of predictable unit processes ...
Gizmochina

Samsung begins mass-producing its latest DRAM packages to improve on-device AI processing

Today Samsung announced it has begun mass production of the “industry’s thinnest” 12 nanometer (nm)-class, 12-gigabyte (GB) and 16GB LPDDR5X DRAM packages. This development is expected to solidify the ...
EDN

Dual-gate transistor-based DRAM to sample by year’s end

Newly Developed DRAM Device Offers Twice the Speed of DDR2, First to Utilize “Dual Gate” Transistor Technology TOKYO, JAPAN — Elpida Memory, Inc., Japan's leading global supplier of Dynamic Random ...
Electronic Design

Overcome Traditional Memory-Speed Barriers With Embedded DRAM

For applications where performance is of primary importance, designers have traditionally chosen SRAM technology over DRAM. Although commodity DRAM offers much higher density and a lower cost per bit, ...