TSMC has announced a breakthrough chip fabrication technology, with reduced node size, increased performance and better power management — all of which should ultimately lead to faster iPhones and ...

Imec is a world-leading research and innovation center in nanoelectronics and digital technologies. Imec has more than 6.000 employees and top researchers, for R&D in advanced semiconductor and system ...

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TL;DR: TSMC is set to begin high-volume production of its advanced N2 (2nm-class) process node with gate-all-around nanosheet transistors in late 2025, delivering up to 15% better performance or 30% ...

Lip-Bu Tan, the chief executive of Intel, is considering stopping the promotion of the company's 18A fabrication technology (1.8nm-class) to foundry customers, instead shifting the company's efforts ...

TL;DR: Intel unveiled its advanced 14A process node featuring second-generation PowerVia PowerDirect technology and RibbonFET 2, enabling superior power efficiency and performance. Utilizing ASML's ...

While all eyes tend to focus on the leading-edge silicon nodes, many mature nodes continue to enjoy robust manufacturing demand. Successive nodes stopped reducing die cost at around the 20nm node. “In ...

Intel Corp. finally had some good news to share for a change, providing an encouraging update on the progress of its most advanced 18A fabrication process, which will be used to manufacture a new ...

As Intel prepares to manufacture chips with its 18A process, the company is previewing its next chip node, 14A, which will feature a mysterious "turbo cell" technology meant to boost CPU and even GPU ...

Intel's new CEO Lip Bu-Tan took to the stage at the company's Intel Foundry Direct 2025 event here in San Jose, California, to outline the company's progress on its foundry initiative. Tan announced ...

Pat gelsinger, boss of Intel, a chipmaker, loves to brag that his firm is leading the charge in semiconductor technology by entering the “angstrom era”. The angstrom, named in honour of Anders Jonas ...

Continued scaling of integrated circuits to smaller dimensions is still a viable way to increase compute power, achieve higher memory cell density, or reduce power consumption. These days, chip makers ...