Design-Reuse

IP Cores, Inc. Announces Two New Multi-Gigabit IP Combo AES/LRW and AES/GCM Cores for System on Chip (SoC) Design

Starting at 30K ASIC gates and delivering up to 10 Gbps throughput, GLM1 and GLM2 cores provide a compact and efficient solution for an SoC designer working on a secure IEEE P1619 storage or IEEE ...
CIOL

Authenticated encryption algorithm for robust resistance against multiple misuse

TOKYO, JAPAN: Nippon Telegraph and Telephone Corporation and Mitsubishi Electric Corporation announced today that in collaboration with the University of Fukui they have jointly developed an ...
Design-Reuse

IP Cores, Inc. Announces New Multi-Gigabit IP Combo AES/XEX and AES/GCM Core Supporting New IEEE P1619 Draft Standard

IP Cores, Inc. announces silicon IP core supporting new industry standards. Starting at 60K ASIC gates and delivering up to 10 Gbps throughput, GXM3 cores provides a compact and efficient solution for ...
TelecomTV

NEC develops authenticated encryption technology for IoT sensors and devices

Tokyo, July 21, 2015 - NEC Corporation (NEC; TSE: 6701) today announced the successful development of OTR, an authenticated encryption technology that reduces computational complexity to approximately ...
Embedded

Silex Insight achieves 100Gbps in FPGA for ChaCha20-Poly1305 IP core

Silex Insight has said it has achieved record-breaking speed for its ChaCha20-Poly1305 hardware crypto engine, managing 800Gbps in ASIC and 100Gbps in an FPGA. Its’ RFC7539 compliant intellectual ...